PRB: OSR2 Sets Bridge Control Register ISA Enable Bit

CAUSE

OSR2 sets the PCI Bridge Control Register ISA Enable bit. Setting the ISA Enable bit causes the bridge to block I/O transactions to the device when the lower 10 bits of the address are in the range 100h-3FFh. This results in the following behavior:

I/O Range: (repeating pattern up to FFFF, only the first 10FFh bytes are shown.)

   1000 - 10FF Forward
   D00  -  FFF    Block Forwarding
   C00  -  CFF    Forward
   900  -  BFF    Block Forwarding
   800  -  8FF Forward
   500  -  7FF Block Forwarding
   400  -  4FF Forward
   100  -  3FF    Block Forwarding
   0    -   FF Forward
				

This can be a problem if the BIOS assigns a PCI device I/O resources in a range that will be blocked by the ISA Enable Mode.