/*
 *
 */

#include "defsfile"
#include <signal.h>

extern scf_drvr_stat	drvrstatic;

/* irqsort - determine if DIO caused the interrupt, transfer control		*/
/*			 to the proper interrupt service routine if so.					*/
error_code irqsort()
{ 
	register Dev_list dev_entry = drvrstatic.v_dev_entry;
	register Scf_lu_stat unit_stat = drvrstatic.v_dev_entry->v_lu_stat;
    register u_char irq_status=0;
    register u_char portc_status=0x1;
    u_int32 val;
    

#ifdef MASK_IRQ
	status_code	irq_state = irq_change(unit_stat->v_irqmask);	/* Disable IRQ */
#endif

	if (unit_stat->v_pci_ven_id == ADLINK_PCI_VENDOR_ID)
	{
        irq_status=IN(unit_stat->v_plx_base+PLX_INTCR);
		/* Check if IRQ from this Port */
		if (irq_status & 0x40 == 0 ||       /* the irq line on plx is disabled */
             irq_status & 0x24 == 0 )       /* neither INT1 nor INT2 is set to 1 */
		{
#ifdef MASK_IRQ
			irq_change(irq_state);	/* Enable IRQ */
#endif
			return E_NOTME;
		}
	}
    else
    {
        /* IRQ is not from the card */
#ifdef MASK_IRQ
		irq_change(irq_state);	/* Enable IRQ */
#endif
		return E_NOTME;
    }

#if defined(_MPF386) && defined(PIC_CISR)
	/* clear interrupt(s) on PIC */
	OUT(0x20, 0x20);
#endif

    portc_status=IN(&unit_stat->PORTADDR[DIO_PORTC]);
    // debug: simply put the value to the out port
    OUT(&unit_stat->PORTADDR[DIO_PORTA], 1);
    if (irq_status & 0x4) /* it's INT 1: either P1C0 or ~P1C3 or hw event trigger */
    {
        /* hw event trigger is disabled in init() */
        /* check if T2 (on P1C3) was pressed ... P1C0 has to be 0 */
        if ((portc_status & 0x1) == 0)
        {
            _os_ev_signal (unit_stat->lms_evh2, &val, 1);
        }
        else
        {
            /* check if T1 (on P1C0) was pressed ... P1C3 has to be 1 */
            if ((portc_status & 0x8) != 0)
            {
                _os_ev_signal (unit_stat->lms_evh1, &val, 1);
            }
        }            
    }
        
    if (irq_status & 0x20) /* it's INT 2: its disabled in init() */
    {

    }
        
    /* clear DIO INT flip flop */ 
    OUT(&unit_stat->PORTADDR[DIO_CLEARINT], 0xFF);

#if defined(NEVERME)
	error = E_NOTME;
#endif

#ifdef MASK_IRQ
	irq_change(irq_state);	/* Enable IRQ */
#endif
	return SUCCESS;
}



/* entxirq - enable transmitter IRQs. NOTE: this routine assumes that IRQs */
/*			 to the cpu are masked.										   */
error_code entxirq(Dev_list dev_entry)	/* device list entry pointer */
{
    /*
	register Scf_lu_stat unit_stat = (Scf_lu_stat) dev_entry->v_lu_stat;	// unit static storage pointer 
	register reg_type_t *screg;			// status/command register pointer 

    do nothing
    */

	return SUCCESS;
}
