/*
 *
 */
#if !defined(_DIO7224_DES)
#define _DIO7224_DES

#define DEV_SPECIFIC

#if defined(REG_WIDTH)
#  if REG_WIDTH == 8
#    define REG_TYPE_STR "u_char"
#    define REG_TYPE u_char
#  else
#    error REG_WIDTH value not supported (only 8 supported)
#  endif
#else
#define REG_WIDTH 8
#define REG_TYPE_STR "u_char"
#define REG_TYPE u_char
#endif

data struct device_specific_des {

    /*  Device specific static variables  */
    u_int32 (REG_TYPE_STR " *%s") v_port,    "Adlink DIO 72xx port address";
    u_int32 ("Scf_lu_stat %s") v_next_lu, ".link to next logical unit";
    u_int32 (REG_TYPE_STR " *v_ports[4]") v_ports1, "address of port 1 (7224)";
    u_int32 ("") v_ports2,  "address of port 2 (7248 - rfu)";
    u_int32 ("") v_ports3,  "address of port 3 (7296 - rfu)";
    u_int32 ("") v_ports4,  "address of port 4 (7296 - rfu)";
	u_int16 v_pci_ven_id,   "PCI Vendor ID";
	u_int16 v_pci_dev_id,   "PCI Device ID";
	u_int32 (REG_TYPE_STR " *%s")	v_plx_base,		"PLX base address";
	u_int32 (REG_TYPE_STR " %s")	v_irq_bit,		"IRQ Bit in Status Register for this Chip";
	u_int32	(REG_TYPE_STR " %s")	v_irq_mask,		"IRQ Mask in Status Register for all Chips on Card";
	u_int32	("u_char *%s") lms_evh1,		"LMS_H1 Event ID";
	u_int32	("u_char *%s") lms_evh2,		"LMS_H2 Event ID";
    
    /* really necessary ?? */
    u_int32	("u_char *%s") lms_m1,			"magic1 32 bit";
	u_int32	("u_char *%s") lms_m2,			"magic2 32 bit";

    u_int16	v_irq_shared,	"IRQ is shared with other Chips";
    REG_TYPE  v_plx_irq_status,   ".plx irq status register contents";
    REG_TYPE  v_sink,       ".holding place for unwanted IN()";
#if REG_WIDTH == 8
    u_int16 ("") v_padding, ".padding to round to next 2 byte boundary";
#endif
}, "dio72xx device specific storage";

#endif