An option called an exchange may be requested as part of a bring or a clear request. This option specifies a range of virtual pages that the main storage management component of SLIC can use for replacement instead of the normal page replacement algorithm. The intent of the exchange operation is to avoid flushing memory of pages that are being referenced and replacing them with pages that are not likely to be referenced more than once. The exchange option is good to use when a large number of pages is to be brought into a small memory or a small memory pool. In Chapter 9, we will see how memory is often divided into several smaller pools and how all paging for a given process operates in a single pool.

A bring or a clear request also optionally can specify that the page or pages be “pinned” in memory. A pinned page is made resident in memory and will not be removed or written back to disk while it remains pinned. Certain SLIC data structures, such as the dispatching elements used by process management, which we discuss in Chapter 9, need to be resident. To perform I/O to or from a virtual page, the page must be pinned, because the real address of the frame in which the page resides is used to move the data from the I/O bus. A separate request can be made to memory management to unpin a single page or a range of pages.

In addition to bringing and clearing pages, it is possible to purge (write) one or more page frames to disk. A purge operation makes sense only when a page frame in memory has been changed so that the copy of the page on disk is not up to date. Unlike bring and clear operations, which are never functionally necessary (page faulting will perform the functions), a purge sometimes is required. For example, if we are doing database journaling, the SLIC component of the database must guarantee that the journal entries in the journal space object have been written to disk. This component can’t wait until page faults occur that force the pages in the journal space to be written to disk; it must use the purge function. A purge operation also may specify that the page or range of pages in memory be unpinned.

Finally, page frames can be removed from memory without writing the pages back to disk. There is no functional reason to remove pages, but doing so does eliminate later disk write operations. This function is useful when, for example, a buffer in memory has been emptied and there is no further use for the data in the buffer.

Data and instructions have separate caches in the PowerPC processors. A cache acts as a buffer between the main memory and the processor. These caches are essentially registers on the processor chip that enable fast access to recently used instructions and data in the memory. In the AS/400, part of the virtual address is used to access these caches.

Pointers must be protected from corruption. It is possible for user-written MI instructions to deliberately change a pointer because pointers are stored in the associated space of MI objects (along with other structures that user-written code needs to access). Physical changes, such as fluctuations in current, also can corrupt pointer values. If a pointer is changed by anything other than a SLIC routine that has the right to change it (using an instruction not directly accessible from the MI), the pointer’s tag bit is turned off by the hardware, making the pointer invalid.

All temporary and permanent objects are pageable ( i.e., can be moved to disk and back into memory as needed). Some SLIC structures (such as the page table) and some SLIC routines are not pageable; they are loaded during IPL and must be in memory at all times. Their addresses do not have to be translated. The virtual address of such a structure or instructions is the real memory address. Such virtual addresses always begin with hexadecimal 800.

With this brief overview, we are ready to get into a detailed examination of these same topics. Let’s first look at the performance implications of the single-level store, then we’ll get into the details of the pointers; finally, we will be able to examine the specifics of address translation. We finish up the chapter with a discussion of disk management. As appropriate, we use our peppers to identify the hot stuff.

Performance Implications of Single-Level Store

Earlier, we stated that a major benefit of the single-level store was to reduce the number of instructions needed to perform certain operating-system functions. We saw that the file system was greatly simplified by not having to move files into the single-level store. Because the database is contained in the single-level store, it, too, sees benefits. We could look at many examples of operating-system functions to see performance benefits, but there is one that all AS/400 users see. This is the AS/400’s interactive performance, which is directly affected by the time it takes to perform a process switch. Let’s continue to look at the example of a process switch and see how it influences overall AS/400 performance.

A conventional operating system that uses segment-relative addressing requires that the contents of the segment registers be changed on a process switch. If these were not changed in such a system, the smaller effective addresses in the new program would mistakenly translate into virtual addresses that belonged to a program in the previous process. The problem occurs because each process in this type of system has its own effective memory, which starts over with address zero. Most modern Unix operating systems, such as IBM’s own AIX, use this type of addressing.

The role of the segment registers in this kind of system is to map the effective addresses into the larger virtual memory. For this to work, the contents of these segment registers must be saved somewhere in memory every time a process is switched out, and restored when the process is brought back in. The use of the segment table, instead of segment registers, in the PowerPC processors eliminates the need to save the register contents in memory — the segment table is already in memory. The SLB registers, however, must be purged on a process switch, because they contain the mappings for the previous process.