The MI Op-Code
Table 4.1 shows the bit assignments for an MI op-code. Bit 3 specifies whether the instruction is a computational format or a noncomputational format. If the instruction is a noncomputational format, the function to be performed is encoded in bits 5 through 15 of the op-code. If it is a computational format, like the Add Numeric example, then bits 5 through 7 provide more information about the instruction. The function to be performed for a computational instruction is encoded in bits 8 through 15.
Table 4.1 Op-Code Bit Assignments
Looking further at the computational format, bit 6 indicates that rounding should be performed. Rounding is a function normally associated with floating-point arithmetic, and that is not what the designers of the MI had in mind. The AS/400 is a commercial machine, and the rounding used at the MI is decimal rounding. Decimal data is treated as having a floating decimal point.
Bit 7 says to use the short form of the instruction. It, too, only has meaning for a computational format. In our Add Numeric example, we had three operands. Two of the operands were added together, and the result was put into a third operand. This left the original two operands unchanged. The short form of the instruction would still add the two operands together, but this time the result would be placed back into the first operand. Thus, the short form is a two-operand format with no third result field.
Finally, there are two bits in a computational format that describe the op-code extender. Bits 4 and 5 are used to determine whether there is an extender and, if so, how it is to be used. This function requires further explanation.
The Op-Code Extender
The MI op-code extender occupies another 16 bits in the instruction and comes in two forms: branch option and indicator option. The existence of the extender is determined by the setting of bit 4. If there is an extender, the branch or indicator option is selected by bit 5.
For the branch option, the op-code extender is divided into four 4-bit fields. Each of these four fields is used to determine the branching capabilities for this instruction. All MI computational instructions can include conditional branching as a part of their execution. In other words, based on the results of the computation, the next MI instruction can be fetched from some other part of the instruction stream.
Consider the first 4-bit field in the extender. If this field contains a value of 1 (binary bits 0001), it means branch if the result of the computation called for by the instruction is a positive value. If the field contains a value of 2 (binary 0010), it means branch if the result is a negative value. If the field has a value of 4 (binary 0100), it means branch if the result is equal to zero. There are also values for not-zero, not-positive, not-negative, and not non-zero. Also, the same bit combination can have different meanings for various types of instructions. For example, a compare instruction interprets the bits differently than an add instruction does.
If the branch condition specified by the first 4-bit field is satisfied, the branch target is found after the last operand in the instruction. If the branch condition is not satisfied, the next sequential instruction is executed. This capability increases, or extends, the length of the instruction.
Because there are four 4-bit fields in the extender, and each of these fields is used to specify a branch condition, each computational instruction can have up to four branch conditions and up to four branch targets. If fewer than four are desired, a value of 0 in the field means no branch.
The capability to do four-way branching on each computational instruction provides a fairly powerful instruction set, but the cost is longer MI instructions. The Add Numeric example can have up to four branch targets, increasing the length by up to 12 more bytes. This instruction can take 25 bytes in memory. This does not create an execution time problem, because MI instructions are not directly executed. It does, however, increase the program size.
The indicator option works in a manner similar to the branch option. The extender has the same four 4-bit fields and the settings are the same. The difference is, rather than branching when the condition is met, an indicator is set. An indicator is a variable in memory that contains a decimal value of one or zero. If, during the execution of a computational instruction, the condition specified in the 4-bit field is satisfied, the indicator is set to a value of 1. If the condition is not satisfied, the indicator is set to a value of 0. Like the branch option, there can be up to four indicators per instruction and the indicator targets follow the last operand.
Many readers will recognize indicators from RPG. The ability to set an indicator, and later perform some action based on that setting, dates back to unit record equipment. RPG indicators are supported directly by the MI instruction set.4 On the surface, this ability may seem old-fashioned. However, many of today’s most modern RISC processors use a very similar approach to set a value of 0 or 1 into a register to indicate the result of a computation. In fact, indicators are alive and well.
4A joke that has circulated for years is that a surefire way to have a large audience at a user-group conference is to include the word indicator in the title of any presentation. People supposedly will pack the room.
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