Extensions to the PowerPC Architecture

Because our first generation of PowerPC processors had extensions specifically designed for the AS/400 and did not implement the full PowerPC architecture, we decided to give them a new name. We wanted to call our processors PowerPC Optimized for the AS/400 Advanced Series. Because that name was such a mouthful, we decided to give them the shorter name PowerPC AS. Most people think AS is for Advanced Series, but many of us prefer to think it is for Amazon Series. With our second generation of processors introduced in 1997, we implemented the full PowerPC architecture plus all of the extensions. Because models of the RS/6000 use these same processors, the AS designation is no longer meaningful. The most significant extension to the architecture for the AS/400 is the support for the memory tags, which we cover in more detail in Chapter 8, but a short description here will show how these architectural extensions were added.

With the System/38, we introduced the concept of a single-level store. Simply put, all memory, including disk, is in a single, large address space. We needed an efficient mechanism to protect areas in memory that a user was not authorized to access. Addressing at the MI is accomplished with the use of 16-byte pointers. In Chapter 5, we will see that a pointer contains an address, and a user can modify that address. Because an address can be modified to point anywhere in memory, we had to provide a way to prevent a user’s unauthorized modification of addresses.

A special memory protection bit, called a tag bit, was associated with every word in the System/38 memory. (A word in the System/38 memory had 32 data bits.) An MI pointer occupied four of these memory words. Whenever the operating system stored a pointer into four consecutive words in the memory, the hardware turned on (set to 1) the four tag bits to indicate that the pointer contained a valid address for the user. If a user changed any part of the pointer in memory, the hardware would turn off (set to 0) the tag bit. If any of the tag bits were off, the address in the pointer was invalid and could not be used to access memory.

For security, a tag bit had to be hidden, kept in a part of the memory where the user could not get at it. A tag bit could not be one of the data bits in the word because a user could see and change that bit. The tag bit had to be a separate bit, but where should it be kept?

The System/38 used separate error-correction code bits for every word in memory. The part of the memory that contained these bits was not visible to programs above the MI. We decided to add another bit to the error-correction code bits and use it as a tag bit. When any user program modified a word in memory, the processor would automatically turn off the hidden tag bit. If that word contained any part of a pointer, it would become invalid. Only the microcode below the MI had instructions to turn on the tag bits.

The AS/400 also uses the tag bits in memory. Because the PowerPC architecture does not recognize tag bits, we had to add a tags-active mode to the architecture. In the tags-active mode, the processor recognizes that tag bits exist, and it will turn off the tag bit whenever a user modifies a word in memory. All AS/400 processors run in the tags-active mode. PowerPC processors in other systems, such as the RS/6000, use the tags-inactive mode.

A 65-Bit Processor?

The width of the memory word was increased to 64 data bits when the AS/400 was introduced. A tag bit is associated with each 8 bytes in memory in an AS/400, and an MI pointer occupies two of these words. For a period of time in 1991, we thought there would be some advantage to keeping the tag bits in the registers of the new RISC processors as well as in the memory. We also considered reducing the size of our MI pointers to occupy only 8 bytes. The 16-byte pointers had unused space in them, and we thought this was a good time to shrink them.

To keep these tagged pointers in the registers, we had to increase the size of the integer registers to 65 bits. We carried this design for almost a year. In 1992, we threw out the design and went back to having the tags only in the memory. There were three main reasons for this change. First, changing the pointer size had a ripple effect into OS/400, which would require more changes than we wanted. Second, this approach limited our future expansion of address size to only 64 bits. Third, and most important, our processors in the tags-active mode would not be compatible with the PowerPC instruction set.

Originally, we didn’t think that not being compatible with PowerPC was important. Future processors that implemented the tags-inactive mode would be fully compatible with PowerPC, where the 65th bit was ignored. In the tags-active mode, originally we were not even planning to implement the 32-bit instructions. We thought that only the AS/400 operating system, which cared only about 64-bit instructions, would use the tags-active mode. We originally didn’t plan to run any 32-bit software in the tags-active mode.

When we decided to be compatible with the PowerPC instruction set, we got rid of the 65th bit in the processor. We thought there might be the possibility for some future software convergence among IBM operating systems (see the discussion on Workplace in the Appendix). Because most PowerPC software will be written for a 32-bit processor, we made sure that all our processors, even in the tags-active mode, implemented the 32-bit instruction set. Our second-generation processor designs have both tags-active and tags-inactive modes so they can run all PowerPC application and operating-system software.

Even though we changed back to a 64-bit processor design years ago, a few people within IBM still talk about the 65-bit design that was never built. The confusion arises because many people don’t know why the tag bit is there in the first place. Perhaps if we had originally called the extra bit in the error-correction code the “pointer in memory protection” bit, instead of the tag bit, fewer people would be confused. Unfortunately, we then would have had to spend all our time explaining why we needed a “pimp” bit.