Consequently, we decided that we needed a full 64-bit processor for our future design. Another factor that influenced this decision was the AS/400’s address width of 48 bits. There was no way to squeeze a 48-bit address into a 32-bit register, and a 64-bit processor would allow us to expand the address used in the IMPI from 48 to 64 bits. Our projections showed that at some point in the future, as AS/400 systems got bigger, we would need the larger address.

The decision was made. We would start with the IMPI, expand it to 64 bits, and add RISC computational operations. We would create the first CISC/RISC hybrid processor designed exclusively for commercial computing. We called it C-RISC for Commercial-RISC. Another factor that had influenced our decision was the amount of microcode that had to be changed. By starting with the IMPI, we would minimize the microcode changes.

PowerPC Technology for the AS/400

Jack Kuehler was the president of IBM in 1991. Kuehler led IBM into the agreement with Apple and Motorola to create PowerPC microprocessors. He believed that by the end of the decade all computers from the smallest hand-held devices to the largest supercomputers would be built using RISC microprocessors. He also believed there would be only a handful of companies building these microprocessors. He was betting that the PowerPC alliance would be one of the few survivors.

Kuehler was perplexed. He couldn’t understand why he had two of his major laboratories each developing new RISC processors. His laboratory in Austin was working on the definition of the PowerPC, while at the same time his laboratory in Rochester was working on C-RISC. Couldn’t these laboratories get together? Convinced that the PowerPC was the right answer for both of us, he began to ask why Rochester could not use the PowerPC.

We dutifully traveled to Armonk, New York, to explain to him the differences between processors designed for commercial and technical computing. He didn’t dispute our success in building commercial processors, but he also didn’t buy our reasons and kept sending us back for more data to prove our position. “Doesn’t the RS/6000 do commercial processing?” he would ask.

After we had made about three visits to Armonk, Kuehler was finally convinced. These people from Rochester do know what they are talking about. They know how to build commercial processors, and these processors are different from those used for technical computing. Kuehler sent us back to Rochester one more time. He wanted us to take 90 days and come back to him with the answers to two questions: (1) What changes to the PowerPC architecture are needed to make it suitable for the AS/400? and (2) What would it cost to move the AS/400 to this new architecture? Kuehler had just opened the door for us to influence the PowerPC design. He also indicated a willingness to fund any additional development costs associated with moving to a new processor based on the PowerPC.

Starting in early April 1991, I led a team of 10 people from Rochester to answer the two questions. Kuehler had also instructed the head of IBM Research, who was responsible for negotiating the PowerPC architecture definition with Apple and Motorola, to work closely with us and make this happen. In addition to working with the PowerPC architects, our engineers worked closely with their counterparts in Austin on processor designs.

The success of this effort was highly dependent on the quality of the technical people on the Rochester team, and we had some of the very best. It was not an easy project. At the outset, it appeared that the requirements for a Rochester system were in contrast with the goals for the PowerPC. Then there was the feeling that if we converged the processor architectures, Rochester would lose its ability to build processors optimized for our commercial processing. Needless to say, we had some very heated discussions.

We decided to start with the PowerPC architecture as it was defined at the time and add the extensions we needed for the AS/400. We called this new extended PowerPC architecture Amazon. This new name allowed us to distinguish between the base PowerPC architecture and the extended architecture.

Although we did have some disagreements in Rochester about whether a common RISC architecture was a good idea, we did make rapid progress on the definition. Two individuals on our team, Andy Wottreng and Mike Corrigan, took over the technical ownership of the extended architecture. They did a marvelous job of integrating the AS/400 technical requirements into the new architecture, an accomplishment for which they later received corporate-wide recognition. When they finished, we had the first RISC architecture in the industry that was equally at home with commercial and technical applications.

Darryl Solie was our team member who watched over the processor designs. Darryl worked closely with the processor design teams in both Austin and Rochester to ensure the cooperation we needed. Rochester designers learned a lot from other IBM and Motorola hardware designers. Processor performance levels they originally argued could never be achieved suddenly looked doable. As a result, Rochester now builds some of the highest-performance RISC processors in the industry and has the responsibility within IBM to design the future 64-bit processors for commercial computing.

Whenever tensions and emotions flared and some of us became convinced that the whole idea wouldn’t work, Bill Berg would step in. Bill, who can be as loud as anyone in an argument, is not exactly known for his quiet demeanor. He does, however, have a quiet diplomatic side that he used to convince us that we were doing the right thing and that we were the only ones who could make it happen. Bill was later instrumental in convincing development to use object-oriented programming technologies for our new operating system software.

The PowerPC architecture was defined to run in both a 32-bit and a 64-bit mode. All 64-bit versions of the PowerPC would have the 32-bit subset. We made almost no changes to the 32-bit subset, concentrating only on the 64-bit mode of the architecture. As we defined the various extensions to the architecture, we were able to make the development cost sizings. We worked hard and finished within the 90 days, but it wasn’t a pretty picture.